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Product Description
Sirenza Microdevices' XD010-42S-D4F 8W power module is a robust 2stage Class A amplifier module for use in the driver stages of linear RF power amplifiers of cellular base stations. The power transistors are fabricated using Sirenza's latest, high performance LDMOS process. This unit operates from a single voltage and has internal temperature compensation of the bias voltage to ensure stable performance over the full temperature range. It is internally matched to 50 ohms.
XD010-42S-D4F XD010-42S-D4FY
Pb
RoHS Compliant
& Green Package
869-894 MHz Class A 8 W Power Amplifier Module
Functional Block Diagram
Stage 1 Stage 2
Product Features
* Available in RoHS compliant packaging * 50 W RF impedance * 8W Output P1dB Typical * Single Supply Operation : Nominally 28V * High Gain: 30 dB at 880 MHz * Advanced, XeMOS II LDMOS FETS * Temperature Compensation
4
Bias Network
Temperature Compensation
1
2
3
Applications
* Base Station PA driver * Repeater
RF in
VD1
VD2 Case Flange = Ground
RF out
* CDMA * GSM / EDGE
Key Specifications
Symbol Frequency P1dB Gain Gain Flatness IRL Efficiency Parameter Frequency of Operation Output Power at 1dB Compression, 880 MHz Gain at 1W Output Power (CW) Over Frequency at 1W Output (CW) Input Return Loss at 1W Output (CW) (50 Ref) Drain Efficiency at 8W CW Output Drain Efficiency at 1W CDMA (Single Carrier IS-95) ACPR at 1W CDMA Output (Single Carrier IS-95, 9 Ch Fwd, Offset=750KHz, ACPR Integrated Bandwidth) Linearity ALT-1 at 1W CDMA (Single Carrier IS-95, 9 Ch Fwd, Offset=1980KHz, ACPR Integrated Bandwidth) 3rd Order IMD at 8W PEP (Two Tone 1MHz Spacing) 3rd Order IMD at 1W PEP (Two Tone 1MHz Spacing) Delay Phase Linearity RTH, j-l Signal Delay from Pin 1 to Pin 4 Deviation from Linear Phase (Peak to Peak) Thermal Resistance Stage 1 (Junction to Case) Unit MHz W dB dB dB % % dB dB dB dBc nS Deg C/W -28 -40 14 22 Min. 869 7 28 8 30 0.4 20 24 3.5 -50 -75 -32 -50 3.9 0.5 11 4 1 Typ. Max. 894
(Junction C/W R Conditions: Z = Z Thermal Resistance Stage 2 = 230mA,to ICase) 700mA, T TestTH, j-2 in out = 50, VDD = 28.0V, IDQ1 DQ2 = Flange = 25C
The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2003 Sirenza Microdevices, Inc. All worldwide rights reserved.
303 S. Technology Court, Broomfield, CO 80021
Phone: (800) SMI-MMIC 1
http://www.sirenza.com EDS-102938 Rev E
XD010-42S-D4F 869-894 MHz 8W Power Amp Module
Quality Specifications
Parameter ESD Rating MTTF Human Body Model, JEDEC Document - JESD22-A114-B 85o C Leadframe, 200 C Channel
o
Unit V Hours
Typical 8000 1.2 X 106
Pin Description
Pin # 1 2 3 4 Flange Function RF Input VD1 VD2 RF Output Gnd Description Module RF input. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads. Care must be taken to protect against video transients that may damage the active devices. This is the drain voltage for the first stage. Nominally +28Vdc This is the drain voltage for the 2nd stage of the amplifier module. The 2nd stage gate bias is temperature compensated to maintain constant quiscent drain current over the operating temperature range. See Note 1. Module RF output. This pin is internally connected to DC ground. Do not apply DC voltages to the RF leads. Care must be taken to protect against video transients that may damage the active devices. Exposed area on the bottom side of the package needs to be mechanically attached to the ground plane of the board for optimum thermal and RF performance. See mounting instructions in application note AN-060 on Sirenza's web site.
Simplified Device Schematic
2 VD1
Temperature
3 VD2
Bias Network Q1 RFin 1
Compensation
Q2
RFout 4
Case Flange = Ground
Absolute Maximum Ratings
Parameters 1st Stage Bias Voltage (VD1 ) 2nd Stage Bias Voltage (VD2) RF Input Power Load Impedance for Continuous Operation Without Damage Output Device Channel Temperature
Base Plate Temperature: Operating with no RF Present
Value 35 35 +20 5:1 +200 +90 -20 to +90 -40 to +100
Unit V V dBm VSWR C C C C
Note 1: The internal generated gate voltage is thermally compensated to maintain constant quiescent current over the temperature range listed in the data sheet. No compensation is provided for gain changes with temperature. This can only be provided with AGC external to the module. Note 2: Internal RF decoupling is included on all bias leads. No additional bypass elements are required, however some applications may require energy storage on the drain leads to accommodate time-varying waveforms. Note 3: This module was designed to have it's leads hand soldered to an adjacent PCB. The maximum soldering iron tip temperature should not exceed 700 F, and the soldering iron tip should not be in direct contact with the lead for longer than 10 seconds. Refer to app note AN054 (www.sirenza.com) for further installation instructions.
Operating Temperature Range Storage Temperature Range
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation see typical setup values specified in the table on page one.
Caution: ESD Sensitive Appropriate precaution in handling, packaging and testing devices must be observed. 303 S. Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC 2
http://www.sirenza.com EDS-102938 Rev E
XD010-42S-D4F 869-894 MHz 8W Power Amp Module
Typical Performance Curves
Gain, IMD, ACP, ALT1 vs. Output Power Freq=881 MHz, Vdd=28V, TFlange=25oC, IS-95 ADJ BW=30KHz @ 750 KHz spacing ALT1 BW=30KHz @1980 KHz spacing IMD @ 1 MHz spacing
31 30 29 Gain (dB) 28 27 26 25 24 23 0 1 2 3 Output Power (W) 4 5 6 Two Tone Gain IMD 1MHz Spacing ACP ALT1 0 -10 -20 -30 -40 -50 -60 -70 -80 ACP (dB), ALT1 (dB), IMD (dBc)
40 35 30 Efficiency (%) 25 20 15 10 5 0 0 2 4 6 8 10 12
Efficiency and Idd vs. Output Pow er and Tem perature Freq=881 MHz, Vdd=28 V, TFlange=-20oC, 25oC, 90oC
2.5 2.3 2.1 1.9 1.7 1.5 1.3 1.1 0.9 Idd (Amps) Input Return Loss (dB)
Efficiency @-20C Efficiency @25C Efficiency @90C Id @-20C Id @ 25C Id @ 90C
Output Power (W)
Two Tone IMD, ACP, ALT1 vs. Frequency Output Power=1 Watt, Vdd=28 V, TFlange=25oC IS95 standard, channel BW= 1.23 MHz, ADJ BW= 30 KHz@ 750 KHz spacing. ALT1 BW= 30 KHz@1980 KHz spacing. IMD@1 MHz spacing.
ACP (dB), ALT1 (dB), IMD (dBc) -30 -35 -40 -45 Gain (dB) -50 -55 -60 -65 -70 -75 -80 865 870 875 880 885 890 895 900 33 31 29 27 25 23 21 19 17 15 13 0
Gain and IMD vs. Output Power and Temperature Freq=881 MHz, Vdd=28 V, TFlange=-20oC, 25oC, 90oC
-10 -15 -20 -25 -30 -35
Two Tone IMD ACP ALT1
Gain @-20C Gain @ 25C Gain @ 90C IMD @-20C IMD @ 25C IMD @ 90C
1 2 3 4 5 6
-40 -45 -50 -55 -60
Frequency (MHz)
Output Power (W)
Gain and IMDs vs. Output Power and Voltage Freq=881 and 882 MHz, Vdd=24 V, 28 V, 32 V TFlange=25oC
31 30 29 28 Gain (dB) 27 26 25 24 23 22 21 0 1 2 3 4 5 6 0 -5 -10 32 31 30 29 IMD (dBc) Gain (dB) 28 27 26 25 24 23 22 865
Gain and Input Return Loss vs. Frequency Output Power=1 Watt, Vdd=28 V, TFlange=25oC
-14 -15 -16 -17 -18
Gain @ 24 Volts Gain @ 28 Volts Gain @ 32 Volts IMD @ 24 Volts IMD @ 28 Volts IMD @ 32 Volts
-15 -20 -25 -30 -35 -40 -45 -50
Gain Input Return Loss
-19 -20 -21 -22 -23
870
875
880
885
890
895
-24 900
Output Power (W)
Frequency (MHz)
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 3
http://www.sirenza.com EDS-102938 Rev E
IMD (dBc)
XD010-42S-D4F 869-894 MHz 8W Power Amp Module
Test Board Schematic with module connections shown Test Board Bill of Materials
Component PCB J1, J2 J3 C1, C10 C2, C20 C3, C30 C25, C26 C21, C22 C23, C24 Mounting Screws Description Rogers 4350, er=3.5 Thickness=30mils SMA, RF, Panel Mount Tab W / Flange MTA Post Header, 6 Pin, Rectangle, Polarized, Surface Mount Cap, 10mF, 35V, 10%, Tant, Elect, D Cap, 0.1mF, 100V, 10%, 1206 Cap, 1000pF, 100V, 10%, 1206 Cap, 68pF, 250V, 5%, 0603 Cap, 0.1mF, 100V, 10%, 0805 Cap, 1000pF, 100V, 10%, 0603 4-40 X 0.250" Manufacturer Rogers Johnson AMP Kemet Johanson Johanson ATC Panasonic AVX Various
Test Board Layout
To receive Gerber files, DXF drawings, a detailed BOM, and assembly recommendations for the test board with fixture, contact applications support at support@sirenza.com. Data sheet for evaluation circuit (XD010-EVAL) available from Sirenza website.
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 4
http://www.sirenza.com EDS-102938 Rev E
XD010-42S-D4F 869-894 MHz 8W Power Amp Module
Package Outline Drawing
Recommended PCB Cutout and Landing Pads for the D4F Package
Note 3: Dimensions are in inches
Refer to Application note AN-060 "Installation Instructions for XD Module Series" for additional mounting info. App note availbale at at www.sirenza.com
303 S. Technology Court Broomfield, CO 80021
Phone: (800) SMI-MMIC 5
http://www.sirenza.com EDS-102938 Rev E

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